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» Using a SAT solver to generate checking sequences
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FROCOS
2011
Springer
12 years 7 months ago
Automatic Proof and Disproof in Isabelle/HOL
Abstract. Isabelle/HOL is a popular interactive theorem prover based on higherorder logic. It owes its success to its ease of use and powerful automation. Much of the automation is...
Jasmin Christian Blanchette, Lukas Bulwahn, Tobias...
PEPM
2009
ACM
15 years 7 months ago
Static Consistency Checking for Verilog Wire Interconnects
The Verilog hardware description language has padding semantics that allow designers to write descriptions where wires of different bit widths can be interconnected. However, many ...
Cherif Salama, Gregory Malecha, Walid Taha, Jim Gr...
NFM
2011
303views Formal Methods» more  NFM 2011»
13 years 2 months ago
Instantiation-Based Invariant Discovery
Abstract. We present a general scheme for automated instantiation-based invariant discovery. Given a transition system, the scheme produces k-inductive invariants from templates re...
Temesghen Kahsai, Yeting Ge, Cesare Tinelli
DATE
2010
IEEE
126views Hardware» more  DATE 2010»
13 years 11 months ago
Scenario-based analysis and synthesis of real-time systems using uppaal
Abstract. We propose an approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-process behaviors of a system are modeled as a set of driving uni...
Kim Guldstrand Larsen, Shuhao Li, Brian Nielsen, S...
SERA
2005
Springer
14 years 1 months ago
Generating UML Models from Domain Patterns
The development of a family of applications in a domain can be greatly eased if patterns in the domain are systematically reused. Systematic use of such a pattern can be achieved ...
Dae-Kyoo Kim, Jon Whittle