201 search results - page 26 / 41 » Using a SAT solver to generate checking sequences |
CAV
2012
Springer
11 years 10 months ago
2012
Springer
Craig interpolation is a well known method of abstraction successfully used in both hardware and software model checking. The logical strength of interpolants can affect the quali...
ISBI
2008
IEEE
14 years 8 months ago
2008
IEEE
We propose a new image analysis method to segment and track cells in a growing colony. By using an intermediate low-dimension image representation yielded by a reliable over-segme...
CAV
2009
Springer
14 years 8 months ago
2009
Springer
Abstract. We present a new technique called Monotonic Partial Order Reduction (MPOR) that effectively combines dynamic partial order reduction with symbolic state space exploration...
FMICS
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. Bounded model checking (BMC) based on satisfiability testing (SAT) has been introduced as a complementary technique to BDDbased symbolic model checking of LTL properties ...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Equivalence checking and property checking are powerful techniques to detect error traces. Debugging these traces is a time consuming design task where automation provides help. I...