Sciweavers

105 search results - page 10 / 21
» Using caching and optimization techniques to improve perform...
Sort
View
ICPPW
2008
IEEE
14 years 2 months ago
Performance Analysis and Optimization of Parallel Scientific Applications on CMP Cluster Systems
Chip multiprocessors (CMP) are widely used for high performance computing. Further, these CMPs are being configured in a hierarchical manner to compose a node in a cluster system....
Xingfu Wu, Valerie E. Taylor, Charles W. Lively, S...
WMPI
2004
ACM
14 years 1 months ago
A compressed memory hierarchy using an indirect index cache
Abstract. The large and growing impact of memory hierarchies on overall system performance compels designers to investigate innovative techniques to improve memory-system efficienc...
Erik G. Hallnor, Steven K. Reinhardt
CASES
2010
ACM
13 years 5 months ago
Balancing memory and performance through selective flushing of software code caches
Dynamic binary translators (DBTs) are becoming increasingly important because of their power and flexibility. However, the high memory demands of DBTs present an obstacle for all ...
Apala Guha, Kim M. Hazelwood, Mary Lou Soffa
VLSID
2009
IEEE
143views VLSI» more  VLSID 2009»
14 years 8 months ago
SACR: Scheduling-Aware Cache Reconfiguration for Real-Time Embedded Systems
Dynamic reconfiguration techniques are widely used for efficient system optimization. Dynamic cache reconfiguration is a promising approach for reducing energy consumption as well...
Weixun Wang, Prabhat Mishra, Ann Gordon-Ross
DATE
2007
IEEE
155views Hardware» more  DATE 2007»
14 years 1 months ago
A novel technique to use scratch-pad memory for stack management
Extensive work has been done for optimal management of scratch-pad memory (SPM) all assuming that the SPM is assigned a fixed address space. The main target objects to be placed o...
Soyoung Park, Hae-woo Park, Soonhoi Ha