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» Using dynamic domino circuits in self-timed systems
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ISCAS
1999
IEEE
87views Hardware» more  ISCAS 1999»
13 years 12 months ago
A novel high gain, high bandwidth CMOS differential front-end for wireless optical systems
This paper describes a high performance CMOS differential input front-end, designed for optical wireless communications. The front-end achieves a 50 MHz bandwidth and a 400 K tran...
E. de Vasconcelos, J. L. Cura, Rui L. Aguiar, Dini...
HPDC
2005
IEEE
14 years 1 months ago
Automatic dynamic run-time optical network reservations
Optical networking may dramatically change high performance distributed computing. One reason is that optical networks can support provisioning dynamically configurable lightpath...
John R. Lange, Ananth I. Sundararaj, Peter A. Dind...
FPL
2006
Springer
140views Hardware» more  FPL 2006»
13 years 11 months ago
A Thermal Management and Profiling Method for Reconfigurable Hardware Applications
Given large circuit sizes, high clock frequencies, and possibly extreme operating environments, Field Programmable Gate Arrays (FPGAs) are capable of heating beyond their designed...
Phillip H. Jones, John W. Lockwood, Young H. Cho
IPPS
2005
IEEE
14 years 1 months ago
Dynamic Delay-Fault Injection for Reconfigurable Hardware
Modern internet and telephone switches consist of numerous VLSI-circuits operating at high frequencies to handle high bandwidths. It is beyond question that such systems must cont...
Bernhard Fechner
ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
14 years 1 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker