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ICCAD
2002
IEEE
94views Hardware» more  ICCAD 2002»
14 years 4 months ago
High-level synthesis of distributed logic-memory architectures
Abstract— With the increasing cost of global communication onchip, high-performance designs for data-intensive applications require architectures that distribute hardware resourc...
Chao Huang, Srivaths Ravi, Anand Raghunathan, Nira...
CISIS
2010
IEEE
14 years 1 months ago
Bringing Introspection Into the BlobSeer Data-Management System Using the MonALISA Distributed Monitoring Framework
Abstract—Introspection is the prerequisite of an autonomic behavior, the first step towards a performance improvement and a resource-usage optimization for largescale distribute...
Alexandra Carpen-Amarie, Jing Cai, Alexandru Costa...
EUROPAR
1999
Springer
13 years 12 months ago
I/O-Conscious Tiling for Disk-Resident Data Sets
This paper describes a tiling technique that can be used by application programmers and optimizing compilers to obtain I/O-efficient versions of regular scientific loop nests. Du...
Mahmut T. Kandemir, Alok N. Choudhary, J. Ramanuja...
ICS
2009
Tsinghua U.
14 years 2 months ago
Performance modeling and automatic ghost zone optimization for iterative stencil loops on GPUs
Iterative stencil loops (ISLs) are used in many applications and tiling is a well-known technique to localize their computation. When ISLs are tiled across a parallel architecture...
Jiayuan Meng, Kevin Skadron
ISORC
2008
IEEE
14 years 2 months ago
Toward Effective Multi-Capacity Resource Allocation in Distributed Real-Time and Embedded Systems
Effective resource management for distributed real-time embedded (DRE) systems is hard due to their unique characteristics, including (1) constraints in multiple resources and (2)...
Nilabja Roy, John S. Kinnebrew, Nishanth Shankaran...