Sciweavers

488 search results - page 90 / 98
» Using shared arrays in message-driven parallel programs
Sort
View
LCTRTS
2009
Springer
14 years 2 months ago
Software transactional memory for multicore embedded systems
Embedded systems, like general-purpose systems, can benefit from parallel execution on a symmetric multicore platform. Unfortunately, concurrency issues present in general-purpos...
Jennifer Mankin, David R. Kaeli, John Ardini
ECOOPW
1994
Springer
13 years 11 months ago
Abstracting Interactions Based on Message Sets
ing Interactions Based on Message Sets Svend Frr 1 and Gul Agha2. 1 Hewlett-Packard Laboratories, 1501 Page Mill Road, Palo Alto, CA 94303 2 University of Illinois, 1304 W. Springf...
Svend Frølund, Gul Agha
ASPLOS
1998
ACM
13 years 11 months ago
A Cost-Effective, High-Bandwidth Storage Architecture
This paper describes the Network-Attached Secure Disk (NASD) storage architecture, prototype implementations of NASD drives, array management for our architecture, and three files...
Garth A. Gibson, David Nagle, Khalil Amiri, Jeff B...
ASAP
2008
IEEE
142views Hardware» more  ASAP 2008»
14 years 1 months ago
Managing multi-core soft-error reliability through utility-driven cross domain optimization
As semiconductor processing technology continues to scale down, managing reliability becomes an increasingly difficult challenge in high-performance microprocessor design. Transie...
Wangyuan Zhang, Tao Li
ISCA
2008
IEEE
143views Hardware» more  ISCA 2008»
13 years 7 months ago
TokenTM: Efficient Execution of Large Transactions with Hardware Transactional Memory
Current hardware transactional memory systems seek to simplify parallel programming, but assume that large transactions are rare, so it is acceptable to penalize their performance...
Jayaram Bobba, Neelam Goyal, Mark D. Hill, Michael...