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» Using the Compiler to Improve Cache Replacement Decisions
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CGO
2005
IEEE
14 years 1 months ago
Compiler Managed Dynamic Instruction Placement in a Low-Power Code Cache
Modern embedded microprocessors use low power on-chip memories called scratch-pad memories to store frequently executed instructions and data. Unlike traditional caches, scratch-p...
Rajiv A. Ravindran, Pracheeti D. Nagarkar, Ganesh ...
MICRO
2006
IEEE
162views Hardware» more  MICRO 2006»
14 years 1 months ago
Adaptive Caches: Effective Shaping of Cache Behavior to Workloads
We present and evaluate the idea of adaptive processor cache management. Specifically, we describe a novel and general scheme by which we can combine any two cache management alg...
Ranjith Subramanian, Yannis Smaragdakis, Gabriel H...
TC
1998
13 years 7 months ago
An Efficient Solution to the Cache Thrashing Problem Caused by True Data Sharing
—When parallel programs are executed on multiprocessors with private caches, a set of data may be repeatedly used and modified by different threads. Such data sharing can often r...
Guohua Jin, Zhiyuan Li, Fujie Chen
CF
2006
ACM
13 years 9 months ago
Intermediately executed code is the key to find refactorings that improve temporal data locality
The growing speed gap between memory and processor makes an efficient use of the cache ever more important to reach high performance. One of the most important ways to improve cac...
Kristof Beyls, Erik H. D'Hollander
PE
2006
Springer
103views Optimization» more  PE 2006»
13 years 7 months ago
The LCD interconnection of LRU caches and its analysis
In a multi-level cache such as those used for web caching, a hit at level l leads to the caching of the requested object in all intermediate caches on the reverse path (levels l -...
Nikolaos Laoutaris, Hao Che, Ioannis Stavrakakis