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» Using the DEVS Paradigm to Implement a Simulated Processor
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DATE
2007
IEEE
97views Hardware» more  DATE 2007»
14 years 3 months ago
Systematic comparison between the asynchronous and the multi-synchronous implementations of a network on chip architecture
In this paper we present a systematic comparison between two different implementations of a distributed Network on Chip: fully asynchronous and multi-synchronous. The NoC architec...
Abbas Sheibanyrad, Ivan Miro Panades, Alain Greine...
ICPR
2004
IEEE
14 years 9 months ago
From Massively Parallel Image Processors to Fault-Tolerant Nanocomputers
Parallel processors such as SIMD computers have been successfully used in various areas of high performance image and data processing. Due to their characteristics of highly regula...
Jie Han, Pieter Jonker
WSC
1996
13 years 10 months ago
Simulation of complex construction processes
Eight successively refined simulation models for the earthmoving operations involved in the construction of a dam provide the foundation for illustrating the ease and effectivenes...
Photios G. Ioannou, Julio C. Martínez
SIGOPS
2010
179views more  SIGOPS 2010»
13 years 3 months ago
Online cache modeling for commodity multicore processors
Modern chip-level multiprocessors (CMPs) contain multiple processor cores sharing a common last-level cache, memory interconnects, and other hardware resources. Workloads running ...
Richard West, Puneet Zaroo, Carl A. Waldspurger, X...
IPPS
1998
IEEE
14 years 29 days ago
Predicting the Running Times of Parallel Programs by Simulation
Predicting the running time of a parallel program is useful for determining the optimal values for the parameters of the implementation and the optimal mapping of data on processo...
Radu Rugina, Klaus E. Schauser