Sciweavers

467 search results - page 43 / 94
» Using the DEVS Paradigm to Implement a Simulated Processor
Sort
View
ISCA
1998
IEEE
104views Hardware» more  ISCA 1998»
14 years 1 months ago
Selective Eager Execution on the PolyPath Architecture
Control-flow misprediction penalties are a major impediment to high performance in wide-issue superscalar processors. In this paper we present Selective Eager Execution (SEE), an ...
Artur Klauser, Abhijit Paithankar, Dirk Grunwald
ERSA
2004
129views Hardware» more  ERSA 2004»
13 years 10 months ago
A Methodology for Energy Efficient Application Synthesis Using Platform FPGAs
Platform FPGAs incorporate many different components, such as processor core(s), reconfigurable logic, memory, etc., onto a single chip. When an application is synthesized on platf...
Jingzhao Ou, Viktor K. Prasanna
JCP
2006
112views more  JCP 2006»
13 years 8 months ago
Mobile Agent Based Wireless Sensor Networks
Recently, mobile agents have been proposed for efficient data dissemination in sensor networks. In the traditional client/server-based computing architecture, data at multiple sour...
Min Chen, Taekyoung Kwon, Yong Yuan, Victor C. M. ...
SC
1993
ACM
14 years 26 days ago
Dynamic data distributions in Vienna Fortran
Vienna Fortran is a machine-independent language extension of Fortran, which is based upon the Single-Program-Multiple-Data SPMD paradigm and allows the user to write programs f...
Barbara M. Chapman, Piyush Mehrotra, Hans Moritsch...
HIPEAC
2010
Springer
14 years 5 months ago
Remote Store Programming
Abstract. This paper presents remote store programming (RSP), a programming paradigm which combines usability and efficiency through the exploitation of a simple hardware mechanism...
Henry Hoffmann, David Wentzlaff, Anant Agarwal