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» Using the DEVS Paradigm to Implement a Simulated Processor
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ASPLOS
2011
ACM
13 years 13 days ago
Sponge: portable stream programming on graphics engines
Graphics processing units (GPUs) provide a low cost platform for accelerating high performance computations. The introduction of new programming languages, such as CUDA and OpenCL...
Amir Hormati, Mehrzad Samadi, Mark Woh, Trevor N. ...
ISLPED
2006
ACM
140views Hardware» more  ISLPED 2006»
14 years 2 months ago
L-CBF: a low-power, fast counting bloom filter architecture
—An increasing number of architectural techniques rely on hardware counting bloom filters (CBFs) to improve upon the enegy, delay and complexity of various processor structures. ...
Elham Safi, Andreas Moshovos, Andreas G. Veneris
ARCS
2010
Springer
13 years 9 months ago
A Tightly Coupled Accelerator Infrastructure for Exact Arithmetics
Processor speed and available computing power constantly increases, enabling computation of more and more complex problems such as numerical simulations of physical processes. In t...
Fabian Nowak, Rainer Buchty
ICS
2003
Tsinghua U.
14 years 2 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
SIGGRAPH
1999
ACM
14 years 1 months ago
Six Degree-of-Freedom Haptic Rendering Using Voxel Sampling
A simple, fast, and approximate voxel-based approach to 6DOF haptic rendering is presented. It can reliably sustain a 1000 Hz haptic refresh rate without resorting to asynchronous...
William A. McNeely, Kevin D. Puterbaugh, James J. ...