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» Using the DEVS Paradigm to Implement a Simulated Processor
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PROCEDIA
2011
12 years 11 months ago
A Multilevel Parallelism Support for Multi-Physics Coupling
A new challenge in scientific computing is to merge existing simulation models to create new higher fidelity combined (often multi-level) models. While this challenge has been a...
Fang Liu, Masha Sosonkina
WSC
2007
13 years 11 months ago
A supply chain paradigm to model business pprocesses at the Y-12 National Security Complex
The NNSA’s Y-12 National Security Complex is a manufacturing facility operated by BWXT Y-12. Y-12’s missions include ensuring the US’ nuclear weapons deterrent, storing nucl...
Reid L. Kress, Jack Dixon, Thomas M. Insalaco, Ric...
IEEEPACT
2000
IEEE
14 years 1 months ago
On Some Implementation Issues for Value Prediction on Wide-Issue ILP Processors
In this paper, we look at two issues which could affect the performance of value prediction on wide-issue ILP processors. One is the large number of accesses to the value predicti...
Sang Jeong Lee, Pen-Chung Yew
VLSISP
2008
123views more  VLSISP 2008»
13 years 8 months ago
Implementation of a Coarse-Grained Reconfigurable Media Processor for AVC Decoder
ADRES (Architecture for Dynamically Reconfigurable Embedded Systems) is a templatized coarse-grained reconfigurable processor architecture. It targets at embedded applications whic...
Bingfeng Mei, Bjorn De Sutter, Tom Vander Aa, M. W...
DATE
2003
IEEE
108views Hardware» more  DATE 2003»
14 years 2 months ago
Comparing Analytical Modeling with Simulation for Network Processors: A Case Study
Programming network processors remains an art due to the variety of different network processor architectures and due to little support to reason and explore implementations on su...
Matthias Gries, Chidamber Kulkarni, Christian Saue...