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» Using unsatisfiable cores to debug multiple design errors
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GLVLSI
2008
IEEE
150views VLSI» more  GLVLSI 2008»
13 years 11 months ago
Using unsatisfiable cores to debug multiple design errors
Due to the increasing complexity of today's circuits a high degree of automation in the design process is mandatory. The detection of faults and design errors is supported qu...
André Sülflow, Görschwin Fey, Rod...
GLVLSI
2010
IEEE
209views VLSI» more  GLVLSI 2010»
14 years 4 months ago
Enhancing debugging of multiple missing control errors in reversible logic
Researchers are looking for alternatives to overcome the upcoming limits of conventional hardware technologies. Reversible logic thereby established itself as a promising directio...
Jean Christoph Jung, Stefan Frehse, Robert Wille, ...
AHS
2006
IEEE
124views Hardware» more  AHS 2006»
14 years 4 months ago
A Generic On-Chip Debugger for Wireless Sensor Networks
— This invited paper overviews the low level debug support hardware required for an on-chip predeployment debugging system for sensor networks. The solution provides significant...
Andrew B. T. Hopkins, Klaus D. McDonald-Maier
FMCAD
2009
Springer
14 years 5 months ago
Scaling VLSI design debugging with interpolation
—Given an erroneous design, functional verification returns an error trace exhibiting a mismatch between the specification and the implementation of a design. Automated design ...
Brian Keng, Andreas G. Veneris
DATE
2008
IEEE
126views Hardware» more  DATE 2008»
14 years 5 months ago
In-band Cross-Trigger Event Transmission for Transaction-Based Debug
Cross-trigger, the mechanism to trigger activities in one debug entity from debug events happened in another debug entity, is a very useful technique for debugging applications in...
Shan Tang, Qiang Xu