Sciweavers

367 search results - page 52 / 74
» Utility-aware Resource Allocation in an Event Processing Sys...
Sort
View
ICCAD
1994
IEEE
82views Hardware» more  ICCAD 1994»
14 years 22 days ago
Generating instruction sets and microarchitectures from applications
Abstract-- The design of application-specific instruction set processor (ASIP) system includes at least three interdependent tasks: microarchitecture design, instruction set design...
Ing-Jer Huang, Alvin M. Despain
IEEEPACT
2006
IEEE
14 years 2 months ago
Compiling for stream processing
This paper describes a compiler for stream programs that efficiently schedules computational kernels and stream memory operations, and allocates on-chip storage. Our compiler uses...
Abhishek Das, William J. Dally, Peter R. Mattson
RTCSA
2005
IEEE
14 years 2 months ago
Fine-Grained Task Reweighting on Multiprocessors
We consider the problem of task reweighting in fair-scheduled multiprocessor systems wherein each task’s processor share is specified as a weight. When a task is reweighted, a ...
Aaron Block, James H. Anderson, Gary Bishop
ICDE
2000
IEEE
89views Database» more  ICDE 2000»
14 years 1 months ago
Managing Escalation of Collaboration Processes in Crisis Mitigation Situations
Processes for crisis mitigation must permit coordination flexibility and dynamic change to empower crisis mitigation coordinators and experts to deal with the unexpected situatio...
Dimitrios Georgakopoulos, Hans Schuster, Donald Ba...
IPPS
1999
IEEE
14 years 27 days ago
DynBench: A Dynamic Benchmark Suite for Distributed Real-Time Systems
In this paper we present the architecture and framework for a benchmark suite that has been developed as part of the DeSiDeRaTa project. The proposed benchmark suite is representat...
Behrooz Shirazi, Lonnie R. Welch, Binoy Ravindran,...