60 search results - page 1 / 12 » Utilizing Formal Assertions for System Design of Network Pro... |
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
System level modeling with executable languages such as C/C++ has been crucial in the development of large electronic systems from general processors to application specific desig...
FDL
2007
IEEE
14 years 1 months ago
2007
IEEE
SystemVerilog encapsulates both design description and verification properties in one language and provides a unified environment for engineers who have the formidable challenge o...
DATE
2004
IEEE
13 years 10 months ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
IPPS
1996
IEEE
13 years 11 months ago
1996
IEEE
Advances in multiprocessor interconnect technologyare leading to high performance networks. However, software overheadsassociated with message passing are limiting the processors ...
NOSSDAV
2005
Springer
14 years 10 days ago
2005
Springer
Service overlay networks have recently attracted tremendous interests. In this paper, we propose a new integrated framework for specifying services composed of service components ...