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» VCC: A Practical System for Verifying Concurrent C
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ICTAI
2005
IEEE
14 years 1 months ago
Improving Lotos Simulation Using Constraint Propagation
Lotos is the ISO formal specification language for describing and verifying concurrent and distributed systems. The simulation or execution of complex Lotos specifications is, h...
Malek Mouhoub, Samira Sadaoui
IPPS
2010
IEEE
13 years 5 months ago
Runtime checking of serializability in software transactional memory
Abstract--Ensuring the correctness of complex implementations of software transactional memory (STM) is a daunting task. Attempts have been made to formally verify STMs, but these ...
Arnab Sinha, Sharad Malik
DATE
2004
IEEE
97views Hardware» more  DATE 2004»
13 years 11 months ago
A Formal Verification Methodology for Checking Data Integrity
Formal verification techniques have been playing an important role in pre-silicon validation processes. One of the most important points considered in performing formal verificati...
Yasushi Umezawa, Takeshi Shimizu
ICCAD
2002
IEEE
100views Hardware» more  ICCAD 2002»
14 years 20 days ago
Optimal buffered routing path constructions for single and multiple clock domain systems
Shrinking process geometries and the increasing use of IP components in SoC designs give rise to new problems in routing and buffer insertion. A particular concern is that cross-c...
Soha Hassoun, Charles J. Alpert, Meera Thiagarajan
ICECCS
2010
IEEE
196views Hardware» more  ICECCS 2010»
13 years 8 months ago
Implementing and Evaluating a Model Checker for Transactional Memory Systems
Abstract—Transactional Memory (TM) is a promising technique that addresses the difficulty of parallel programming. Since TM takes responsibility for all concurrency control, TM ...
Woongki Baek, Nathan Grasso Bronson, Christos Kozy...