46 search results - page 8 / 10 » VERILAT: verification using logic augmentation and transform... |
FLAIRS
2001
13 years 8 months ago
2001
We present our consistency support tool BIS, an extension to the electronic product data management system (EPDMS) used at DaimlerChrysler AG to configure the Mercedes lines of pa...
POPL
2009
ACM
14 years 8 months ago
2009
ACM
As cryptographic proofs have become essentially unverifiable, cryptographers have argued in favor of developing techniques that help tame the complexity of their proofs. Game-base...
MEMOCODE
2010
IEEE
13 years 5 months ago
2010
IEEE
Electronic System Level (ESL) design manages the complexity of todays systems by using abstract models. In this context Transaction Level Modeling (TLM) is state-of-theart for desc...
AIML
2008
13 years 9 months ago
2008
In 1983, Valentini presented a syntactic proof of cut-elimination for a sequent calculus GLSV for the provability logic GL where we have added the subscript V for "Valentini&q...
MICRO
1999
IEEE
13 years 11 months ago
1999
IEEE
Building a high-performance microprocessor presents many reliability challenges. Designers must verify the correctness of large complex systems and construct implementations that ...