r acceptance of FPGAs as a computing device requires a higher level of programming abstraction. ROCCC is an optimizing C to HDL compiler. We describe the code generation approach i...
Since redundant number systems allow for constant time addition, they are often at the heart of modular multipliers designed for public key cryptography (PKC) applications. Indeed,...
Most hardware compilers apply loop pipelining to increase the parallelism achieved, but pipelining is restricted to the only innermost level in a nested loop. In this work we exten...
Kieron Turkington, Turkington A. Constantinides, K...
Abstract. In this paper we suggest a three-language (3L) paradigm for building the program generator models. The basis of the paradigm is a relationship model of the specification,...
Vytautas Stuikys, Giedrius Ziberkas, Robertas Dama...
Several traditional VHDL fault injection mechanisms like mutants or saboteurs have been adapted to SystemC model descriptions. The main drawback of these approaches is the necessi...