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» VLSI Circuit Synthesis Using a Parallel Genetic Algorithm
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ISVLSI
2007
IEEE
151views VLSI» more  ISVLSI 2007»
14 years 1 months ago
Design of a MCML Gate Library Applying Multiobjective Optimization
In this paper, the problem of sizing MOS Current Mode Logic (MCML) circuits is addressed. The Pareto front is introduced as a useful analysis tool to explore the design space of e...
Roberto Pereira-Arroyo, Pablo Alvarado-Moya, Wolfg...
GECCO
2006
Springer
215views Optimization» more  GECCO 2006»
13 years 11 months ago
A multi-chromosome approach to standard and embedded cartesian genetic programming
Embedded Cartesian Genetic Programming (ECGP) is an extension of Cartesian Genetic Programming (CGP) that can automatically acquire, evolve and re-use partial solutions in the for...
James Alfred Walker, Julian Francis Miller, Rachel...
ISPD
2009
ACM
112views Hardware» more  ISPD 2009»
14 years 2 months ago
Post-floorplanning power/ground ring synthesis for multiple-supply-voltage designs
The multiple-supply voltage (MSV) design style has been extensively applied to mitigate dynamic-power consumption. The MSV design paradigm, however, brings many crucial challenges...
Wan-Ping Lee, Diana Marculescu, Yao-Wen Chang
DSD
2010
IEEE
137views Hardware» more  DSD 2010»
13 years 5 months ago
A C-to-RTL Flow as an Energy Efficient Alternative to Embedded Processors in Digital Systems
We present a high-level synthesis flow for mapping an algorithm description (in C) to a provably equivalent registertransfer level (RTL) description of hardware. This flow uses an ...
Sameer D. Sahasrabuddhe, Sreenivas Subramanian, Ku...
EH
2003
IEEE
247views Hardware» more  EH 2003»
14 years 25 days ago
Evolvable Building Blocks for Analog Fuzzy Logic Controllers
This work discusses the use of an Evolvable Hardware (EHW) platform in the synthesis of analog electronic circuits for Fuzzy Logic Controllers. A Fuzzy Logic Controller (FLC) is d...
Jorge Luís Machado do Amaral, José F...