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» VLSI Circuit Synthesis Using a Parallel Genetic Algorithm
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VLSID
2000
IEEE
94views VLSI» more  VLSID 2000»
13 years 12 months ago
A Genetic Algorithm for the Synthesis of Structured Data Paths
The technique presented here achieves simultaneous optimization of schedule time and data path component cost within a structured data path architecture, using a genetic algorithm...
Chittaranjan A. Mandal, R. M. Zimmer
IPPS
1998
IEEE
13 years 11 months ago
Synthesis of a Systolic Array Genetic Algorithm
The paper presents the design of a hardware genetic algorithm which uses a pipeline of systolic arrays. Demostrated is the design methodology, where a simple genetic algorithm exp...
Graham M. Megson, I. M. Bland
CATA
2007
13 years 9 months ago
Simulated Evolution based Hybrids for Genetic Algorithm and Tabu Search
In this paper, Simulated Evolution based goodness attributes are incorporated into Tabu Search and Genetic Algorithms to enhance performance as compared to canonical strategies. I...
Sadiq M. Sait, Mohammed Faheemuddin, Mustafa I. Al...
EH
2003
IEEE
127views Hardware» more  EH 2003»
14 years 25 days ago
Comparing Different Serial and Parallel Heuristics to Design Combinational Logic Circuits
In this paper, we perform a comparative study of different heuristics used to design combinational logic circuits. The use of local search hybridized with a genetic algorithm and ...
Carlos A. Coello Coello, Enrique Alba, Gabriel Luq...
VLSID
2002
IEEE
135views VLSI» more  VLSID 2002»
14 years 8 months ago
An Efficient Algorithm for Low Power Pass Transistor Logic Synthesis
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
Rupesh S. Shelar, Sachin S. Sapatnekar