110 search results - page 8 / 22 » VLSI Circuit Synthesis Using a Parallel Genetic Algorithm |
IPPS
1998
IEEE
13 years 11 months ago
1998
IEEE
In this communication Simulated Annealing and Genetic Algorithms, are applied to the graph partitioning problem. These techniques mimic processes in statistical mechanics and biol...
TCAD
2002
13 years 7 months ago
2002
This paper describes an application of a Constructive Genetic Algorithm (CGA) to the Gate Matrix Layout Problem (GMLP). The GMLP happens in very large scale integration (VLSI) desi...
CCE
2005
13 years 7 months ago
2005
A general method to design optimal redundant sensor network even in the case of one sensor failure and able to estimate process key parameters within a required accuracy is propos...
GECCO
2006
Springer
13 years 11 months ago
2006
Springer
Genetic Parallel Programming (GPP) is a novel Genetic Programming paradigm. Based on the GPP paradigm and a local search operator - FlowMap, a logic circuit synthesizing system in...
ICCD
1997
IEEE
13 years 11 months ago
1997
IEEE
Simulated annealing based standard cell placement for VLSI designs has long been acknowledged as a compute-intensive process. All previous work in parallel simulated annealing bas...