428 search results - page 14 / 86 » Validating High-Level Synthesis |
DFT
1993
IEEE
14 years 3 months ago
1993
IEEE
ICCAD
1993
IEEE
14 years 3 months ago
1993
IEEE
ISCAS
1994
IEEE
14 years 3 months ago
1994
IEEE
VLSID
1994
IEEE
14 years 3 months ago
1994
IEEE
In this paper, we present a formal analysis of the constraints of the scheduling problem, and evaluate the structure of the scheduling polytope described by those constraints. Pol...
DAC
1994
ACM
14 years 3 months ago
1994
ACM
Abstract -- This paper describes a new memory estimation technique for DSP applications written in an applicative language. Since no concept of storage is present in an applicative...