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» Validating High-Level Synthesis
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FDL
2005
IEEE
14 years 4 months ago
Hardware Synthesis of Parallel Machines from SystemC
Heterogeneous system specifications implicitly assume parallel execution of their components that rely on supporting platform architectures and operating systems. Unfortunately, c...
Antoni Portero, Lluis Ribas, Jordi Carrabina
IJCAT
2010
77views more  IJCAT 2010»
13 years 9 months ago
Synthesis of cartoon fire based on hand-drawn samples
: In this paper we present an approach for synthesising and editing cartoon fire series based on hand-drawn samples. Our approach first extracts outlines of hand-drawn cartoon fire...
Yi Gu, Jinhui Yu, Ren Peng
ICLP
2009
Springer
14 years 11 months ago
Generative Modeling by PRISM
PRISM is a probabilistic extension of Prolog. It is a high level language for probabilistic modeling capable of learning statistical parameters from observed data. After reviewing ...
Taisuke Sato
FCCM
2011
IEEE
241views VLSI» more  FCCM 2011»
13 years 2 months ago
Multilevel Granularity Parallelism Synthesis on FPGAs
— Recent progress in High-Level Synthesis (HLS) es has helped raise the abstraction level of FPGA programming. However implementation and performance evaluation of the HLS-genera...
Alexandros Papakonstantinou, Yun Liang, John A. St...
ASPDAC
1995
ACM
116views Hardware» more  ASPDAC 1995»
14 years 2 months ago
A datapath synthesis system for the reconfigurable datapath architecture
Abstract — A datapath synthesis system (DPSS) for the reconfigurable datapath architecture (rDPA) is presented. The DPSS allows automatic mapping of high level descriptions onto...
Reiner W. Hartenstein, Rainer Kress