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» Validating High-Level Synthesis
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CORR
2006
Springer
112views Education» more  CORR 2006»
13 years 11 months ago
High-level synthesis under I/O Timing and Memory constraints
The design of complex Systems-on-Chips implies to take into account communication and memory access constraints for the integration of dedicated hardware accelerator. In this paper...
Philippe Coussy, Gwenolé Corre, Pierre Bome...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
14 years 5 months ago
ASIP design and synthesis for non linear filtering in image processing
This paper presents an Application Specific Instruction Set Processor (ASIP) design for the implementation of a class of nonlinear image processing algorithms, the Retinex-like fi...
Luca Fanucci, Michele Cassiano, Sergio Saponara, D...
TSD
2004
Springer
14 years 4 months ago
Slovak Text-to-Speech Synthesis in ARTIC System
Abstract. This paper presents a brand-new Slovak text-to-speech system. It was developed within the framework of ARTIC system (primarily designed to synthesize Czech speech) with r...
Jindrich Matousek, Daniel Tihelka
INTERSPEECH
2010
13 years 5 months ago
Enhancements of viterbi search for fast unit selection synthesis
The paper describes the optimisation of Viterbi search used in unit selection TTS, since with a large speech corpus necessary to achieve a high level of naturalness, the performan...
Daniel Tihelka, Jirí Kala, Jindrich Matouse...
IGARSS
2010
13 years 8 months ago
SMOS L1 algorithms
The Level 1 Processing of SMOS transforms the data acquired by MIRAS (Microwave Imaging Radiometer with Aperture Synthesis) into geolocated TOA Brightness Temperatures, providing ...
Antonio Gutierrez, Jose Barbosa, Nuno Catarino, Ri...