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» Validating High-Level Synthesis
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DATE
2003
IEEE
123views Hardware» more  DATE 2003»
14 years 4 months ago
RTOS Modeling for System Level Design
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
Andreas Gerstlauer, Haobo Yu, Daniel Gajski
VLSID
2003
IEEE
147views VLSI» more  VLSID 2003»
14 years 11 months ago
SoC Synthesis with Automatic Hardware Software Interface Generation
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...
Amarjeet Singh 0002, Amit Chhabra, Anup Gangwar, B...
GW
2005
Springer
161views Biometrics» more  GW 2005»
14 years 4 months ago
Captured Motion Data Processing for Real Time Synthesis of Sign Language
Abstract. The work described in this abstract presents a roadmap towards the creation and specification of a virtual humanoid capable of performing expressive gestures in real tim...
Alexis Heloir, Sylvie Gibet, Franck Multon, Nicola...
ECBS
1996
IEEE
155views Hardware» more  ECBS 1996»
14 years 3 months ago
Model-Integrated Program Synthesis Environment
In this paper, it is shown that, through the use of Model-Integrated Program Synthesis MIPS, parallel real-time implementations of image processing data ows can be synthesized fro...
Janos Sztipanovits, Gabor Karsai, Hubertus Franke
MIDDLEWARE
2005
Springer
14 years 4 months ago
Frugal Event Dissemination in a Mobile Environment
Abstract. This paper describes an event dissemination algorithm that impletopic-based publish/subscribe interaction abstraction in mobile ad-hoc networks (MANETs). Our algorithm is...
Sébastien Baehni, Chirdeep Singh Chhabra, R...