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ISCA
2009
IEEE
189views Hardware» more  ISCA 2009»
14 years 2 months ago
Hybrid cache architecture with disparate memory technologies
Caching techniques have been an efficient mechanism for mitigating the effects of the processor-memory speed gap. Traditional multi-level SRAM-based cache hierarchies, especially...
Xiaoxia Wu, Jian Li, Lixin Zhang, Evan Speight, Ra...
ISCA
2011
IEEE
269views Hardware» more  ISCA 2011»
12 years 11 months ago
Crafting a usable microkernel, processor, and I/O system with strict and provable information flow security
High assurance systems used in avionics, medical implants, and cryptographic devices often rely on a small trusted base of hardware and software to manage the rest of the system. ...
Mohit Tiwari, Jason Oberg, Xun Li 0001, Jonathan V...
WICSA
2008
13 years 9 months ago
uDesign: End-User Design Applied to Monitoring and Control Applications for Smart Spaces
This paper introduces an architectural style for enabling end-users to quickly design and deploy software systems in domains characterized by highly personalized and dynamic requi...
João Pedro Sousa, Bradley R. Schmerl, Vahe ...
ICC
2007
IEEE
170views Communications» more  ICC 2007»
14 years 2 months ago
Evaluating Techniques for Network Layer Independence in Cognitive Networks
— Cognitive networks are the latest progression of cognitive functionality into the networking stack, an effort which began with a layer one and two focus on cognitive radios, an...
Muthukumaran Pitchaimani, Benjamin J. Ewy, Joseph ...
TES
2001
Springer
14 years 3 days ago
Security for Distributed E-Service Composition
Current developments show that tomorrow’s information systems and applications will no longer be based on monolithic architectures that encompass all the functionality. Rather, t...
Stefan Seltzsam, Stephan Börzsönyi, Alfo...