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» Validation and Verification of Simulation Models
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FMCAD
2007
Springer
13 years 11 months ago
A Mechanized Refinement Framework for Analysis of Custom Memories
We present a framework for formal verification of embedded custom memories. Memory verification is complicated ifficulty in abstracting design parameters induced by the inherently ...
Sandip Ray, Jayanta Bhadra
WSC
1998
13 years 8 months ago
Development and Application of a Validation Framework for Traffic Simulation Models
This paper discusses the concept of validation and proposes a multistage validation framework for traffic simulation models. The framework consists of conceptual validation and op...
Lei Rao, Larry E. Owen, David Goldsman
DAC
2005
ACM
14 years 8 months ago
Simulation based deadlock analysis for system level designs
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...
Xi Chen, Abhijit Davare, Harry Hsieh, Alberto L. S...
DAC
2006
ACM
14 years 1 months ago
SystemC transaction level models and RTL verification
This paper describes how systems companies are adopting SystemC transaction level models for system on chip design and verification, and how these transaction level models are bei...
Stuart Swan
WSC
2004
13 years 8 months ago
Parallel Discrete Event Simulation of Space Shuttle Operations
This paper describes the application of parallel simulation techniques to represent structured functional parallelism present within the Space Shuttle Operations Flow, utilizing t...
José A. Sepúlveda, Luis C. Rabelo, M...