363 search results - page 12 / 73 » Validation coverage analysis for complex digital designs |
EURODAC
1994
IEEE
14 years 26 days ago
1994
IEEE
This paper presents a testability improvement method for digital systems described in VHDL behavioral specification. The method is based on testability analysis at registertransfe...
ICST
2008
IEEE
14 years 3 months ago
2008
IEEE
This paper introduces a new method for generating test data that combines the benefits of equivalence partitioning, boundary value analysis and cause-effect analysis. It is suitab...
ICCAD
2010
IEEE
13 years 6 months ago
2010
IEEE
Abstract--We present a methodology for implementing digital signal processing (DSP) operations such as filtering with biomolecular reactions. From a DSP specification, we demonstra...
ICCAD
2003
IEEE
14 years 5 months ago
2003
IEEE
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
In the design of highly complex, heterogeneous, and concurrent systems, deadlock detection and resolution remains an important issue. In this paper, we systematically analyze the ...