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PVLDB
2010
342views more  PVLDB 2010»
13 years 8 months ago
CRIUS: User-Friendly Database Design
Non-technical users are increasingly adding structures to their data. This gives rise to the need for database design. However, traditional database design is deliberate and heavy...
Li Qian, Kristen LeFevre, H. V. Jagadish
QEST
2010
IEEE
13 years 7 months ago
Automatic Compositional Reasoning for Probabilistic Model Checking of Hardware Designs
Adaptive techniques like voltage and frequency scaling, process variations and the randomness of input data contribute signi cantly to the statistical aspect of contemporary hardwa...
Jayanand Asok Kumar, Shobha Vasudevan
GLVLSI
2011
IEEE
344views VLSI» more  GLVLSI 2011»
13 years 1 months ago
Circuit design of a dual-versioning L1 data cache for optimistic concurrency
This paper proposes a novel L1 data cache design with dualversioning SRAM cells (dvSRAM) for chip multi-processors (CMP) that implement optimistic concurrency proposals. In this n...
Azam Seyedi, Adrià Armejach, Adrián ...
DAC
2001
ACM
14 years 10 months ago
LOTTERYBUS: A New High-Performance Communication Architecture for System-on-Chip Designs
This paper presents LOTTERYBUS, a novel high-performance communication architecture for system-on-chip (SoC) designs. The LOTTERYBUS architecture was designed to address the follo...
Kanishka Lahiri, Anand Raghunathan, Ganesh Lakshmi...
AAAI
2010
13 years 11 months ago
G-Optimal Design with Laplacian Regularization
In many real world applications, labeled data are usually expensive to get, while there may be a large amount of unlabeled data. To reduce the labeling cost, active learning attem...
Chun Chen, Zhengguang Chen, Jiajun Bu, Can Wang, L...