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DAC
2009
ACM
14 years 2 months ago
Clock skew optimization via wiresizing for timing sign-off covering all process corners
Manufacturing process variability impacts the performance of synchronous logic circuits by means of its effect on both clock network and functional block delays. Typically, varia...
Sari Onaissi, Khaled R. Heloue, Farid N. Najm
ICPPW
2009
IEEE
14 years 2 months ago
Dynamic Control and Resource Allocation in Wireless-Infrastructured Distributed Cellular Networks with OFDMA
—In this paper, we consider joint optimization of end-to-end data transmission and resource allocation for Wireless-Infrastructured Distributed Cellular Networks (WIDCNs), where ...
Lei You, Ping Wu, Mei Song, Junde Song, Yong Zhang
DCOSS
2009
Springer
14 years 2 months ago
Fast Self-stabilization for Gradients
Abstract. Gradients are distributed distance estimates used as a building block in many sensor network applications. In large or long-lived deployments, it is important for the est...
Jacob Beal, Jonathan Bachrach, Daniel Vickery, Mar...
SMA
2009
ACM
149views Solid Modeling» more  SMA 2009»
14 years 2 months ago
A sketching interface for feature curve recovery of free-form surfaces
In this paper, we present a semi-automatic approach to efficiently and robustly recover the characteristic feature curves of a given free-form surface. The technique supports a s...
Ellen Dekkers, Leif Kobbelt, Richard R. Pawlicki, ...
GLVLSI
2008
IEEE
147views VLSI» more  GLVLSI 2008»
14 years 2 months ago
Statistical timing analysis of flip-flops considering codependent setup and hold times
Statistical static timing analysis (SSTA) plays a key role in determining performance of the VLSI circuits implemented in state-of-the-art CMOS technology. A pre-requisite for emp...
Safar Hatami, Hamed Abrishami, Massoud Pedram