1229 search results - page 140 / 246 » Variational Linear Response |
ICCAD
2003
IEEE
14 years 7 months ago
2003
IEEE
Static timing analysis is a critical step in design of any digital integrated circuit. Technology and design trends have led to significant increase in environmental and process v...
ISCAS
2008
IEEE
14 years 4 months ago
2008
IEEE
—A 333MHz-1GHz all-digital multiphase delay-locked loop with precise multi-phase output has been designed with TSMC 130nm CMOS technology model. A modified binary search algorith...
ISBI
2007
IEEE
14 years 4 months ago
2007
IEEE
Membrane proteins organize themselves in a linear fashion where adjacent cells are attached together along the basal-lateral region. Their intensity distributions are often hetero...
ICB
2007
Springer
14 years 4 months ago
2007
Springer
Current iris recognition systems can achieve high level of success under restricted conditions, while they still face challenges of utilizing images with heavy deformation caused b...
DATE
2002
IEEE
14 years 3 months ago
2002
IEEE
Transistor tapering is a widely used technique applied to optimize the geometries of CMOS transistors in highperformance circuit design with a view to minimizing the delay of a FE...