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124
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CGO
2004
IEEE
15 years 6 months ago
Physical Experimentation with Prefetching Helper Threads on Intel's Hyper-Threaded Processors
Pre-execution techniques have received much attention as an effective way of prefetching cache blocks to tolerate the everincreasing memory latency. A number of pre-execution tech...
Dongkeun Kim, Shih-Wei Liao, Perry H. Wang, Juan d...
121
Voted
MMM
2009
Springer
126views Multimedia» more  MMM 2009»
15 years 11 months ago
A User Experience Model for Home Video Summarization
In this paper, we propose a novel system for automatically summarizing home videos based on a user experience model. The user experience model takes account of user’s spontaneous...
Wei-Ting Peng, Wei-Jia Huang, Wei-Ta Chu, Chien-Na...
128
Voted
TEI
2010
ACM
133views Hardware» more  TEI 2010»
15 years 9 months ago
Move it!: puppetry for creativity
This project studied the influence of kinesthetic intelligences on creativity in young children. To understand this relationship preschoolers were observed in their daycare setti...
Jasmine M. Williams
142
Voted
DATE
2006
IEEE
142views Hardware» more  DATE 2006»
15 years 8 months ago
Physical-aware simulated annealing optimization of gate leakage in nanoscale datapath circuits
For CMOS technologies below 65nm, gate oxide direct tunneling current is a major component of the total power dissipation. This paper presents a simulated annealing based algorith...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...
157
Voted
ISQED
2006
IEEE
109views Hardware» more  ISQED 2006»
15 years 8 months ago
Dual-K Versus Dual-T Technique for Gate Leakage Reduction : A Comparative Perspective
As a result of aggressive technology scaling, gate leakage (gate oxide direct tunneling) has become a major component of total power dissipation. Use of dielectrics of higher perm...
Saraju P. Mohanty, Ramakrishna Velagapudi, Elias K...