In today’s computing environment, unauthorized accesses and misuse of critical data can be catastrophic to personal users, businesses, emergency services, and even national defe...
Jianfeng Peng, Chuan Feng, Haiyan Qiao, Jerzy W. R...
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...
Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
We describe two things. First, we present a uniform framework for object oriented specification and verification of hardware. For this purpose the object oriented language `e'...
Tommy Kuhn, Tobias Oppold, Markus Winterholer, Wol...
In this paper, we present our Advanced TCP Evaluation Testbed on Mixed Wired Internet and Satellite Environments. Categories and Subject Descriptors C.2.2 [Network Protocols]:–A...
Rosario Firrincieli, Carlo Caini, Cesar Marcondes,...
– An instruction set level reference model was developed for the development of synergistic processing unit (SPU) , which is one of the key components of the cell processor [1][2...
Yukio Watanabe, Balazs Sallay, Brad W. Michael, Da...