Sciweavers

61 search results - page 6 / 13
» Verification Environment for a SCMP Architecture
Sort
View
DAC
1999
ACM
13 years 11 months ago
Cycle and Phase Accurate DSP Modeling and Integration for HW/SW Co-Verification
We present our practical experience in the modeling and integration of cycle/phase-accurate instruction set architecture (ISA) models of digital signal processors (DSPs) with othe...
Lisa M. Guerra, Joachim Fitzner, Dipankar Talukdar...
ANCS
2010
ACM
13 years 4 months ago
An architecture for software defined cognitive radio
As we move forward towards the next generation of wireless protocols, the push for a better radio physical layer is ever increasing. Conventional radio architectures are limited t...
Aveek Dutta, Dola Saha, Dirk Grunwald, Douglas C. ...
IEEESCC
2005
IEEE
14 years 28 days ago
Using a Rigorous Approach for Engineering Web Service Compositions: A Case Study
In this paper we discuss a case study for the UK Police IT Organisation (PITO) on using a model-based approach to verifying web service composition interactions for a coordinated ...
Howard Foster, Sebastián Uchitel, Jeff Mage...
ISSS
2002
IEEE
125views Hardware» more  ISSS 2002»
14 years 7 days ago
Design Experience of a Chip Multiprocessor Merlot and Expectation to Functional Verification
We have fabricated a Chip Multiprocessor prototype code-named Merlot to proof our novel speculative multithreading architecture. On Merlot, multiple threads provide wider issue wi...
Satoshi Matsushita
CF
2004
ACM
14 years 23 days ago
The happy marriage of architecture and application in next-generation reconfigurable systems
New applications and standards are first conceived only for functional correctness and without concerns for the target architecture. The next challenge is to map them onto an arch...
Ingrid Verbauwhede, Patrick Schaumont