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ICCAD
2002
IEEE
146views Hardware» more  ICCAD 2002»
14 years 5 months ago
Conflict driven learning in a quantified Boolean Satisfiability solver
Within the verification community, there has been a recent increase in interest in Quantified Boolean Formula evaluation (QBF) as many interesting sequential circuit verification ...
Lintao Zhang, Sharad Malik
ISMVL
2007
IEEE
104views Hardware» more  ISMVL 2007»
14 years 3 months ago
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL
Designing modern circuits comprised of millions of gates is a very challenging task. Therefore new directions are investigated for efficient modeling and verification of such syst...
Mahsan Amoui, Daniel Große, Mitchell A. Thor...
FPGA
2004
ACM
137views FPGA» more  FPGA 2004»
14 years 2 months ago
Making visible the thermal behaviour of embedded microprocessors on FPGAs: a progress report
This paper shows a method to verifying the thermal status of complex FPGA-based circuits like microprocessors. Thus, the designer can evaluate if a particular block is working bey...
Sergio López-Buedo, Eduardo I. Boemo
ESWS
2006
Springer
14 years 10 days ago
An Infrastructure for Acquiring High Quality Semantic Metadata
Because metadata that underlies semantic web applications is gathered from distributed and heterogeneous data sources, it is important to ensure its quality (i.e., reduce duplicate...
Yuangui Lei, Marta Sabou, Vanessa Lopez, Jianhan Z...
FM
2008
Springer
127views Formal Methods» more  FM 2008»
13 years 10 months ago
A Schedulerless Semantics of TLM Models Written in SystemC Via Translation into LOTOS
TLM (Transaction-Level Modeling) was introduced to cope with the increasing complexity of Systems-on-Chip designs by raising the modeling level. Currently, TLM is primarily used fo...
Olivier Ponsini, Wendelin Serwe