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» Verification and Compliance Testing
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DAC
2005
ACM
13 years 9 months ago
VLIW: a case study of parallelism verification
Parallelism in processor architecture and design imposes a verification challenge as the exponential growth in the number of execution combinations becomes unwieldy. In this paper...
Allon Adir, Yaron Arbetman, Bella Dubrov, Yossi Li...
FMCAD
2007
Springer
14 years 1 months ago
Formal Verification of Partial Good Self-Test Fencing Structures
— The concept of applying partial fencing to logic built-in self test (LBIST) hardware structures for the purpose of using partially good chips is well known in the chip design i...
Adrian E. Seigler, Gary A. Van Huben, Hari Mony
CAISE
2006
Springer
13 years 11 months ago
Experiences with Modeling and Verification of Regulations
Information system models commonly describe organizations in terms of the structure of the data they use, the organization of the processes they perform and the operations that wil...
Jan Vanthienen, Christophe Mues, Stijn Goedertier
DEXA
2010
Springer
186views Database» more  DEXA 2010»
13 years 7 months ago
An Open Platform for Business Process Modeling and Verification
Abstract. In this paper we present the BPAL platform that includes a logicbased language for business process (BP) modeling and a reasoning mechanism providing support for several ...
Antonio De Nicola, Michele Missikoff, Maurizio Pro...
CHARME
2003
Springer
97views Hardware» more  CHARME 2003»
13 years 11 months ago
Coverage Metrics for Formal Verification
In formal verification, we verify that a system is correct with respect to a specification. Even when the system is proven to be correct, there is still a question of how complete ...
Hana Chockler, Orna Kupferman, Moshe Y. Vardi