169 search results - page 17 / 34 » Verification of Dynamically Reconfigurable Logic |
POPL
2005
ACM
14 years 8 months ago
2005
ACM
We present a new approach to partial-order reduction for model checking software. This approach is based on initially exploring an arbitrary interleaving of the various concurrent...
ICCD
2008
IEEE
14 years 4 months ago
2008
IEEE
—One of the major design verification challenges in the development of Anton, a massively parallel special-purpose machine for molecular dynamics, was to provide evidence that co...
CCS
2006
ACM
13 years 11 months ago
2006
ACM
Web applications are the Achilles heel of our current ICT infrastructure. NIST's national vulnerability database clearly shows that the percentage of vulnerabilities located ...
AAAI
2000
13 years 9 months ago
2000
We propose an epistemic dynamic logic EDL able to represent the interactions between action and knowledge that are fundamental to planning under partial observability. EDL enables...
DATE
2003
IEEE
14 years 1 months ago
2003
IEEE
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...