169 search results - page 18 / 34 » Verification of Dynamically Reconfigurable Logic |
DATE
1999
IEEE
1999
IEEE
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs
14 years 17 hour ago
This paper reports a formal methodology for verifying a broad class of synthesized register-transfer-level (RTL) designs by accommodating various register allocation/optimization ...
ATAL
2010
Springer
13 years 8 months ago
2010
Springer
We propose Alternating-time Dynamic Logic (ADL) as a multi-agent variant of Dynamic Logic in which atomic programs are replaced by coalitions. In ADL, the Dynamic Logic operators ...
CAV
2010
Springer
13 years 5 months ago
2010
Springer
We describe Breach, a Matlab toolbox providing a coherent set of simulation-based techniques aimed at the analysis of deterministic models of hybrid dynamical systems. The primary ...
RV
2010
Springer
13 years 5 months ago
2010
Springer
The RV system is the first system to merge the benefits of Runtime Monitoring with Predictive Analysis. The Runtime Monitoring portion of RV is based on the successful Monitoring O...
ECMDAFA
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. The Unified Modelling Language (UML) is intended to describe systems, but it is not clear what systems satisfy a given collection of UML diagrams. Stephen Mellor has desc...