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» Verification of Good Design Style of UML Models
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CL
2008
Springer
13 years 7 months ago
Automatic synthesis and verification of real-time embedded software for mobile and ubiquitous systems
Currently available application frameworks that target the automatic design of real-time embedded software are poor in integrating functional and non-functional requirements for m...
Pao-Ann Hsiung, Shang-Wei Lin
ASYNC
2002
IEEE
120views Hardware» more  ASYNC 2002»
14 years 16 days ago
Relative Timing Based Verification of Timed Circuits and Systems
Advanced clock-delayed1 and self-resetting domino circuits are becoming increasingly important design styles in aggressive synchronous as well as asynchronous design. Their design...
Peter A. Beerel, Ken S. Stevens, Hoshik Kim
FMAM
2010
157views Formal Methods» more  FMAM 2010»
13 years 5 months ago
An Experience on Formal Analysis of a High-Level Graphical SOA Design
: In this paper, we present the experience gained with the participation in a case study in which a novel high-level design language (UML4SOA) was used to produce a service-oriente...
Maurice H. ter Beek, Franco Mazzanti, Aldi Sulova
SBMF
2010
Springer
205views Formal Methods» more  SBMF 2010»
13 years 2 months ago
A High-Level Language for Modeling Algorithms and Their Properties
Designers of concurrent and distributed algorithms usually express them using pseudo-code. In contrast, most verification techniques are based on more mathematically-oriented forma...
Sabina Akhtar, Stephan Merz, Martin Quinson
FMSD
2006
83views more  FMSD 2006»
13 years 7 months ago
A Framework for Modeling the Distributed Deployment of Synchronous Designs
Synchronous specifications are appealing in the design of large scale hardware and software systems because of their properties that facilitate verification and synthesis. When the...
Luca P. Carloni, Alberto L. Sangiovanni-Vincentell...