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» Verification of Language Based Fault-Tolerance
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ASYNC
2007
IEEE
129views Hardware» more  ASYNC 2007»
13 years 11 months ago
Formal Verification of CHP Specifications with CADP Illustration on an Asynchronous Network-on-Chip
Few formal verification techniques are currently available for asynchronous designs. In this paper, we describe a new approach for the formal verification of asynchronous architec...
Gwen Salaün, Wendelin Serwe, Yvain Thonnart, ...
IEICET
2006
114views more  IEICET 2006»
13 years 7 months ago
Synchronization Verification in System-Level Design with ILP Solvers
Concurrency is one of the most important issues in system-level design. Interleaving among parallel processes can cause an extremely large number of different behaviors, making de...
Thanyapat Sakunkonchak, Satoshi Komatsu, Masahiro ...
LREC
2008
102views Education» more  LREC 2008»
13 years 8 months ago
ALC: Alcohol Language Corpus
A number of forensic studies published during the last 50 years report that intoxication with alcohol influences speech in a way that is made manifest in certain features of the s...
Florian Schiel, Christian Heinrich, Sabine Barf&uu...
INFSOF
2006
158views more  INFSOF 2006»
13 years 7 months ago
DEVSpecL: DEVS specification language for modeling, simulation and analysis of discrete event systems
Discrete EVent Systems Specification (DEVS) formalism supports specification of discrete event models in a hierarchical modular manner. This paper proposes a DEVS modeling languag...
Ki Jung Hong, Tag Gon Kim
CADE
2007
Springer
14 years 7 months ago
System for Automated Deduction (SAD): A Tool for Proof Verification
In this paper, a proof assistant, called SAD, is presented. SAD deals with mathematical texts that are formalized in the ForTheL language (brief description of which is also given)...
Konstantin Verchinine, Alexander V. Lyaletski, And...