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» Verification of System Level Model Transformations
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ISSS
2002
IEEE
127views Hardware» more  ISSS 2002»
15 years 7 months ago
Validation in a Component-Based Design Flow for Multicore SoCs
Currently, since many SoCs include heterogeneous components such as CPUs, DSPs, ASICs, memories, buses, etc., system integration becomes a major step in the design flow. To enable...
Ahmed Amine Jerraya, Sungjoo Yoo, Aimen Bouchhima,...
EMSOFT
2010
Springer
15 years 14 days ago
Semantics-preserving implementation of synchronous specifications over dynamic TDMA distributed architectures
We propose a technique to automatically synthesize programs and schedules for hard real-time distributed (embedded) systems from synchronous data-flow models. Our technique connec...
Dumitru Potop-Butucaru, Akramul Azim, Sebastian Fi...
132
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ECRTS
2008
IEEE
15 years 9 months ago
Temporal Analysis for Adapting Concurrent Applications to Embedded Systems
Embedded services and applications that interact with the real world often, over time, need to run on different kinds of hardware (low-cost microcontrollers to powerful multicore ...
Sibin Mohan, Johannes Helander
ICSOFT
2007
15 years 3 months ago
Integrating Software Architecture Concepts Into the MDA Platform
: Architecture Description Languages (ADLs) provide an abstract representation of software systems. Achieving a concrete mapping of such representation into the implementation is o...
Adel Alti, Tahar Khammaci, Adel Smeda, Djamel Benn...
SIGSOFT
2001
ACM
16 years 3 months ago
Detecting implied scenarios in message sequence chart specifications
Scenario-based specifications such as Message Sequence Charts (MSCs) are becoming increasingly popular as part of a requirements specification. Scenarios describe how system compo...
Jeff Kramer, Jeff Magee, Sebastián Uchitel