In this paper, we present a generic approach to integrate datatypes expressed using formal specification languages within state diagrams. Our main motivations are (i) to be able t...
We describe the verification of the IM: a large, complex (12,000 gates and 1100 latches) circuit that detects and marks the boundaries between Intel architecture (IA-32) instructi...
Mark Aagaard, Robert B. Jones, Carl-Johan H. Seger
— We present a waveform based variational static timing analysis methodology. It is a timing paradigm that lies midway between convention static delay approximations and full dyn...
In this demonstration1 we present an approach to engineering service brokering requirements and capabilities using the concepts of Service Modes. The demonstration illustrates buil...
Howard Foster, Arun Mukhija, David S. Rosenblum, S...
Programs of a software product line can be synthesized by composing modules that implement features. Besides high-level domain constraints that govern the compatibility of feature...
Sahil Thaker, Don S. Batory, David Kitchin, Willia...