242 search results - page 6 / 49 » Verification via Structure Simulation |
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
We introduce a new method of verifying the timing of custom CMOS circuits. Due to the exponential number of patterns required, traditional simulation methods are unable to exhaust...
ICCAD
1999
IEEE
14 years 2 months ago
1999
IEEE
Constraining and input biasing are frequently used techniques in functional verification methodologies based on randomized simulation generation. Constraints confine the simulatio...
GLVLSI
2002
IEEE
14 years 2 months ago
2002
IEEE
Spectral techniques have found many applications in computeraided design, including synthesis, verification, and testing. Decision diagram representations permit spectral coeffici...
ACSC
2007
IEEE
14 years 1 months ago
2007
IEEE
Security protocols are often specified at the application layer; however, application layer specifications give little detail regarding message data structures at the presentation...
IJSEKE
2011
13 years 1 months ago
2011
rather wide gap in abstraction between policies and mechanisms. In this paper, we propose a general approach for property verification for MAC models. The approach defines a stan...