584 search results - page 103 / 117 » Verification-Aware Microprocessor Design |
ISCA
2002
IEEE
14 years 19 days ago
2002
IEEE
On-chip caches represent a sizable fraction of the total power consumption of microprocessors. Although large caches can significantly improve performance, they have the potential...
ISCA
2002
IEEE
14 years 19 days ago
2002
IEEE
An instruction set architecture (ISA) suitable for future microprocessor design constraints is proposed. The ISA has hierarchical register files with a small number of accumulator...
MICRO
2002
IEEE
14 years 19 days ago
2002
IEEE
We describe the design, analysis, and performance of an on–line algorithm to dynamically control the frequency/voltage of a Multiple Clock Domain (MCD) microarchitecture. The MC...
MICRO
2002
IEEE
14 years 19 days ago
2002
IEEE
Excessive power consumption is widely considered as a major impediment to designing future microprocessors. With the continued scaling down of threshold voltages, the power consum...
ADAEUROPE
2010
Springer
14 years 16 days ago
2010
Springer
Now that multicore microprocessors have become a commodity, it is natural to think about employing them in all kinds of computing, including high-reliability embedded real-time sy...