584 search results - page 52 / 117 » Verification-Aware Microprocessor Design |
ARCS
2010
Springer
14 years 20 days ago
2010
Springer
Register renaming is a widely used technique to remove false data dependencies in contemporary superscalar microprocessors. The register rename logic includes a mapping table that ...
GLVLSI
1998
IEEE
14 years 3 days ago
1998
IEEE
With the increased clock frequency of modern, high-performance processors over 500 MHz, in some cases, limiting the power dissipation has become the most stringent design target. ...
ISSS
1998
IEEE
14 years 3 days ago
1998
IEEE
Designing a cost effective superscalar architecture for x86 compatible microprocessors is a challenging task in terms of both technical difficulty and commercial value. One of the...
ICCAD
1997
IEEE
14 years 2 days ago
1997
IEEE
We present a new matrix formulation of the face hypercube embedding problem that motivates the design of an efficient search strategy to find an encoding that satisfies all fac...
MICRO
1994
IEEE
13 years 12 months ago
1994
IEEE
High performance architectures have always had to deal with the performance-limiting impact of branch operations. Microprocessor designs are going to have to deal with this proble...