118 search results - page 19 / 24 » Verifying Correctness of Transactional Memories |
ISCA
2006
IEEE
14 years 1 months ago
2006
IEEE
Transactional Memory (TM), Thread-Level Speculation (TLS), and Checkpointed multiprocessors are three popular architectural techniques based on the execution of multiple, cooperat...
HOTOS
2007
IEEE
13 years 11 months ago
2007
IEEE
We propose a new concurrent programming model, Automatic Mutual Exclusion (AME). In contrast to lock-based programming, and to other programming models built over software transac...
ASPLOS
2008
ACM
13 years 9 months ago
2008
ACM
The reality of multi-core hardware has made concurrent programs pervasive. Unfortunately, writing correct concurrent programs is difficult. Addressing this challenge requires adva...
RTSS
2008
IEEE
14 years 1 months ago
2008
IEEE
COTS peripherals are heavily used in the embedded market, but their unpredictability is a threat for high-criticality real-time systems: it is hard or impossible to formally verif...
MEMOCODE
2007
IEEE
14 years 1 months ago
2007
IEEE
The always increasing complexity of digital system is overcome in design flows based on Transaction Level Modeling (TLM) by designing and verifying the system at difbstraction le...