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KBSE
2005
IEEE
15 years 10 months ago
Learning to verify branching time properties
We present a new model checking algorithm for verifying computation tree logic (CTL) properties. Our technique is based on using language inference to learn the fixpoints necessar...
Abhay Vardhan, Mahesh Viswanathan
CORR
2010
Springer
91views Education» more  CORR 2010»
15 years 4 months ago
Verifiable Network-Performance Measurements
In the current Internet, there is no clean way for affected parties to react to poor forwarding performance: to detect and assess Service Level Agreement (SLA) violations by a con...
Katerina J. Argyraki, Petros Maniatis, Ankit Singl...
DATE
2003
IEEE
145views Hardware» more  DATE 2003»
15 years 9 months ago
Automated Bus Generation for Multiprocessor SoC Design
The performance of a system, especially a multiprocessor system, heavily depends upon the efficiency of its bus architecture. This paper presents a methodology to generate a custo...
Kyeong Keol Ryu, Vincent John Mooney
ISSTA
2004
ACM
15 years 9 months ago
Verifying process models built using parameterized state machines
Software process and workflow languages are increasingly used to define loosely-coupled systems of systems. These languages focus on coordination issues such as data flow and c...
Barbara Staudt Lerner
JC
2002
50views more  JC 2002»
15 years 4 months ago
Verifying Topological Indices for Higher-Order Rank Deficiencies
It has been known how to use computational fixed point theorems to verify existence and uniqueness of a true solution to a nonlinear system of equations within a small region abou...
R. Baker Kearfott, Jianwei Dian