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» Verifying Progress in Timed Systems
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103
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ICCAD
1994
IEEE
65views Hardware» more  ICCAD 1994»
15 years 7 months ago
Incremental formal design verification
Language containment is a method for design verification that involves checking if the behavior of the system to be verified is a subset of the behavior of the specifications (pro...
Gitanjali Swamy, Robert K. Brayton
129
Voted
CODES
2007
IEEE
15 years 6 months ago
Pointer re-coding for creating definitive MPSoC models
Today's MPSoC synthesis and exploration design flows start abstract input specification model captured in a system level design language. Usually this model is created from a...
Pramod Chandraiah, Rainer Dömer
121
Voted
ASIACRYPT
2006
Springer
15 years 6 months ago
Simulation-Sound NIZK Proofs for a Practical Language and Constant Size Group Signatures
Non-interactive zero-knowledge proofs play an essential role in many cryptographic protocols. We suggest several NIZK proof systems based on prime order groups with a bilinear map...
Jens Groth
182
Voted
COMPSAC
2004
IEEE
15 years 6 months ago
Services-Oriented Dynamic Reconfiguration Framework for Dependable Distributed Computing
Web services (WS) received significant attention recently because services can be searched, bound, and executed at runtime over the Internet. This paper proposes a dynamic reconfi...
Wei-Tek Tsai, Weiwei Song, Raymond A. Paul, Zhibin...
107
Voted
AICCSA
2005
IEEE
129views Hardware» more  AICCSA 2005»
15 years 4 months ago
Enhanced visual evaluation of feature extractors for image mining
Plus BROWSE SEARCH IEEE XPLORE GUIDE SUPPORT View TOC Enhanced visual evaluation of feature extractors for image mining Rodrigues, J.F., Jr. Traina, A.J.M. Traina, C., Jr. Comput. ...
José Fernando Rodrigues Jr., Agma J. M. Tra...