1093 search results - page 110 / 219 » Verifying VLSI Circuits |
ASPDAC
2005
ACM
14 years 3 months ago
2005
ACM
The sustained miniaturization of VLSI feature size presents great challenges to sub-wavelength photolithography and requests usage of many Resolution Enhancement Techniques (RET)....
GLVLSI
2010
IEEE
14 years 3 months ago
2010
IEEE
Higher operating frequencies have increased the importance of inductance in power and ground networks. The effective inductance of the power and ground network can be reduced with...
DFT
2002
IEEE
14 years 3 months ago
2002
IEEE
A novel approach for reducing power consumption in checkers used for concurrent error detection is presented. Spatial correlations between the outputs of the circuit that drives t...
GLVLSI
2010
IEEE
14 years 2 months ago
2010
IEEE
This paper presents a self-compensation scheme of manufacturing variability for clock skew reduction. In the proposed scheme, a CDN with embedded variability sensors tunes variabl...
GLVLSI
2000
IEEE
14 years 2 months ago
2000
IEEE
— Typically, placement algorithms attempt to minimize the total net length of a printed circuit board (PCB). However, an MCM’s increased throughput and dense circuitry can easi...