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» Verifying VLSI Circuits
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GECCO
2003
Springer
158views Optimization» more  GECCO 2003»
14 years 2 months ago
Active Control of Thermoacoustic Instability in a Model Combustor with Neuromorphic Evolvable Hardware
Continuous Time Recurrent Neural Networks (CTRNNs) have previously been proposed as an enabling paradigm for evolving analog electrical circuits to serve as controllers for physica...
John C. Gallagher, Saranyan Vigraham
GLVLSI
2010
IEEE
156views VLSI» more  GLVLSI 2010»
14 years 2 months ago
A multi-level approach to reduce the impact of NBTI on processor functional units
NBTI is one of the most important silicon reliability problems facing processor designers today. The impact of NBTI can be mitigated at both the circuit and microarchitecture leve...
Taniya Siddiqua, Sudhanva Gurumurthi
GLVLSI
2010
IEEE
154views VLSI» more  GLVLSI 2010»
14 years 2 months ago
Read-out schemes for a CNTFET-based crossbar memory
This paper investigates read-out schemes for a crossbar memory using CNTFET-based elements as cross-points. Two read-out schemes are presented in this paper; the first scheme bias...
Sheng Lin, Yong-Bin Kim, Fabrizio Lombardi
DFT
2002
IEEE
127views VLSI» more  DFT 2002»
14 years 1 months ago
A New Functional Fault Model for FPGA Application-Oriented Testing
1 The objective of this paper is to propose a new fault model suitable for test pattern generation for an FPGA configured to implement a given application. The paper demonstrates t...
Maurizio Rebaudengo, Matteo Sonza Reorda, Massimo ...
VLSID
2002
IEEE
97views VLSI» more  VLSID 2002»
14 years 1 months ago
Power Supply Noise Aware Floorplanning and Decoupling Capacitance Placement
Power supply noise is a strong function of the switching activities of the circuit modules. Peak power supply noise can be significantly reduced by judiciously arranging the modu...
Shiyou Zhao, Kaushik Roy, Cheng-Kok Koh