1093 search results - page 132 / 219 » Verifying VLSI Circuits |
IOLTS
2008
IEEE
14 years 3 months ago
2008
IEEE
Present and future semiconductor technologies are characterized by increasing parameters variations as well as an increasing susceptibility to external disturbances. Transient err...
SOCC
2008
IEEE
14 years 3 months ago
2008
IEEE
In this paper a new ultra low power SRAM cell is proposed. In the proposed SRAM topology, additional circuitry has been added to a standard 6T-SRAM cell to improve the static nois...
FDL
2006
IEEE
14 years 17 days ago
2006
IEEE
In this work, an approach to the `verification-oriented' modeling of the analog parts' behavior of mixed-signal circuits is presented. Starting from a continuous-time, c...
GLVLSI
2006
IEEE
14 years 3 months ago
2006
IEEE
Process variations have become a key concern of circuit designers because of their significant, yet hard to predict impact on performance and signal integrity of VLSI circuits. St...
IPPS
2010
IEEE
13 years 6 months ago
2010
IEEE
This paper focuses on parallelization of the classic static timing analysis (STA) algorithm for verifying timing characteristics of digital integrated circuits. Given ever-increasi...